(a) Field of the Invention
The present invention relates to a method of performing a seasoning process for a semiconductor device, and more particularly, to a method of seasoning a semiconductor processing chamber (or apparatus) that reduces an etch residue created in a process for manufacturing a semiconductor device.
(b) Description of the Related Art
Since semiconductor devices have been more highly integrated due to recent developments in manufacturing processes, critical dimensions thereof have also been reduced. A dry-etching process is mainly used for forming a pattern in a semiconductor device. In order to ensure a precise critical dimension, the dry-etching process should have high selectivity with respect to etching certain layers, structures or materials (and not others). The dry-etching process should also provide a precise amount of etching (or have a predictable etch rate under predetermined etch conditions). Moreover, it is important to maintain the reproducibility of the manufacturing processes for each wafer.
However, when a dry-etching process is performed directly after firstly setting or cleaning a dry-etching chamber, or directly after an idling time between processes, etching loss(es) may occur on a running wafer due to an unstable atmosphere (or other unstable condition[s]) in the dry-etching chamber.
In order to prevent such a problem in a dry-etching process, a seasoning process using a test wafer may be performed before a main etching process on production wafers. A seasoning process is a process for etching a test wafer before performing the main etching process, and one objective of the seasoning process is to “season” a processing chamber, or provide a more stable and/or reliable processing environment in the chamber. A seasoning process is therefore performed in the same chamber and under the same process conditions as the main etching process.
FIG. 1A to FIG. 1D are cross-sectional views showing sequential stages of a conventional method of performing a seasoning process for a semiconductor device. A conventional seasoning process for an apparatus adapted to form (or etch) metal lines of a semiconductor device will hereinafter be described with reference to FIG. 1A to FIG. 1D.
As shown in FIG. 1A, an anti-reflection coating (ARC) layer 12, a metal layer 14, and an anti-reflection coating layer 16 are sequentially deposited or otherwise formed on an (interlayer) insulating layer 10, as layers to form a structure in a semiconductor substrate. Here, the insulating layer 10 includes an insulating material, such as USG, BSG, PSG, BPSG, etc., and the anti-reflection coating layers 12 and 16 generally comprise a metal material, such as Ti, TiN, or a metal alloy material such as TiW alloy. In addition, the metal layer 14 comprises a metal material, such as Al or Cu.
As shown in FIG. 1B, a photoresist 20 is coated on an entire surface of the anti-reflection coating layer 16 by using a spin coating scheme.
As shown in FIG. 1C, a pattern to define a metal line region is formed when the photoresist 20 is patterned by an exposing and developing process using a metal line mask.
In addition, as shown in FIG. 1D, before performing a main etching process in a dry-etching chamber, metal interconnection lines are formed on a test or “dummy” wafer in a seasoning process by dry-etching the anti-reflection coating layer 16, the metal layer 14, and anti-reflection coating layer 12 thereon using the photoresist pattern 20 as an etch mask. Subsequently, the photoresist pattern 20 and an etch residue are removed from the test/dummy wafer by performing an ashing process, for example.
However, when dry-etching the metal layer 14 on the test or dummy wafer, a conventional seasoning process for a semiconductor device may create an etch residue in the etching chamber (or apparatus), and an amount of etch residue in a central region of the test/dummy wafer is different from that of an edge region of the test/dummy wafer. That is, the central region of the wafer may have an etch residue of which a main source is a photoresist, but the edge region of the wafer may have an etch residue of which a main source is an anti-reflection coating layer or metal layer. Therefore, the etch residue may not be uniformly accumulated on the wafer, and the total amount of etch residue in the etching chamber (or apparatus) may increase.
The above information disclosed in this Background section is only for enhancement of understanding of the background of the invention, and therefore, it may contain information that does not form prior art or other information that is already known in this or any other country to a person of ordinary skill in the art.